About this role
Responsibilities • Execute pre-silicon and post-silicon validation for structural blocks in high-performance silicon platforms used in broadcast infrastructure systems. • Develop, deploy, and maintain structural test patterns including ATPG, scan, transition delay fault (TDF), retention testing, and high-voltage stress validation. • Identify, isolate, and debug structural failures such as stuck-at faults, delay faults, and retention issues impacting silicon reliability. • Collaborate with Design-for-Test (DFT), Design Verification (DV), and design teams to improve test coverage and silicon quality. • Ensure silicon correctness and robustness for deployment in high-availability live broadcast environments. • Perform wafer and package-level characterization across Process, Voltage, and Temperature (PVT) corners. • Define and analyze operating margins including voltage, frequency, and stability thresholds for production readiness. • Conduct stress-based testing including dynamic voltage and high-voltage validation to ensure device robustness. • Ensure silicon stability for mission-critical broadcast deployment environments such as live production units and mobile broadcast systems. • Support Wafer Sort (WS) and Final Test (FT) execution and debug activities. • Analyze production failures and drive root cause analysis for yield improvement. • Implement Test Time Reduction (TTR) strategies and optimize test flows for efficiency. • Improve overall silicon quality, yield performance, and production stability. • Develop and execute automated test programs using Advantest V93K (Smartest 8 / SM8 environment). • Build automation scripts and workflows to support test execution, debug, and regression processes. • Perform data analysis using tools such as Exensio and Python-based frameworks for yield and performance insights. • Maintain engineering workflows and test program releases using GIT-based version control systems. • Support continuous improvement of test infrastructure and automation frameworks. Requirements • Bachelor’s Degree in Electronics & Communication Engineering or related field. • Minimum 3–5 years of experience in ATE test engineering, silicon validation, or structural debug roles. • Experience in advanced-node silicon environments (e.g., 4nm / 3nm) preferred. • Strong analytical and problem-solving skills with structured debugging approach. • Ability to work in cross-functional engineering environments. • Exposure to broadcast systems, live streaming infrastructure, or high-reliability media platforms is an advantage. • Strong understanding of silicon failure analysis and production debug methodologies. • Ability to translate silicon-level issues into system-level reliability improvements. • Expert in Automation and Scripting using Python
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